The world’s leading semiconductor technology company, Samsung Electronics, yesterday announced a plan to migrate to 3-nanometer and 2-nanometer (nm) technology using its Gate-All-Around (GAA) transistor structure at its 5th Samsung Foundry Forum (SFF) 2021.
Over 2,000 customers and partners from around the world are expected to attend this multi-day virtual event, themed Adding One More Dimension. Samsung will explain this year’s goals, which are designed to strengthen its position as a leading company in the rapidly evolving foundry market by investing in the technology needed for the next-level process, manufacturing operations, and foundry services.
“We will increase our overall production capacity and lead the most advanced technologies while taking silicon scaling a step further and continuing technological innovation by application,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics.” Amid further digitalization prompted by the COVID-19 pandemic, our customers and partners will discover the limitless potential of silicon implementation for delivering the right technology at the right time.”
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GAA Is Ready for Customers’ Adoption – 3nm MP in 2022, 2nm in 2025
With its enhanced power, performance, and flexible design capability Samsung’s unique GAA technology, Multi-Bridge-Channel FET (MBCFETTM), is essential for continuing process migration. The first 3nm VAA Samsung process node with MBCFETs could result in a 35 percent reduction in area, a 30 percent boost in performance, and a 50 percent reduction in power consumption. With increased process maturity, 3nm’s logic yield is approaching a level that is comparable to 4nm’s currently in mass production, as well as improvements in power, performance, and area (PPA).
Samsung is scheduled to start manufacturing its first 3nm-based chips in the first half of 2022, while its second generation of 3nm is expected in 2023. With a mass production date of 2025, Samsung is planning to begin mass production of its 2nm process node with MBCFET.
FinFET for CIS, DDI, MCU – 17nm Specialty Process Technology Debuts
To support specialty products with cost-effectiveness and application-specific competitiveness, Samsung Foundry continuously advances FinFET process technology.
One example of this is the 17nm FinFET process node offered by the company. A 3D transistor architecture enables excellent performance and power efficiency on top of the intrinsic benefits of FinFET. In comparison to Samsung’s 28nm process, 17nm FinFETs offer a 43 percent decrease in area, 39 percent improvement in performance, and a 49 percent improvement in power efficiency.
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Further, Samsung is developing its 14nm process to support 3.3V high voltage or flash-type embedded MRAM (eMRAM), which enables increased write speeds and densities. It will be a great option for microcontroller units (MCUs), IoT, and wearable devices. According to Samsung, its new 8nm RF platform will assist the company in expanding its leadership in 5G semiconductors beyond microwaves to mmWave.
Samsung Foundry will hold its SAFE Forum virtually in November 2021 in cooperation with its ecosystem partners.
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